Brian Aspnes

Brian Aspnes is a Senior Principal Hardware Architect in Intel's Data Center Hardware Engineering Group, where he leads the development of next-generation AI server and accelerator platform architectures. Over a 30-year Intel career he has worked across networking, cloud, enterprise, HPC and AI infrastructure. At OCP he is Project Lead for Modular Hardware Systems (MHS), a key contributor to the Open Systems for AI initiative, and a co-author and Intel technical lead of the Open Adapter Card (OAC) specification.